Publications

@inproceedings{Buta2021,

title = {Design and Validation of a SpW Converter for Intra-Spacecraft Communications},

author = {Rares-Calin Buta and Botond Sandor Kirei and Cristian Codau and Andra Pastrav and Calin Farcas and Raluca Simedroni and Paul Dolea and Tudor Palade and Emanuel Puschita},

editor = {Norbert Herencsar},

doi = {10.1109/TSP52935.2021.9522627},

isbn = {978-1-6654-2933-7},

year  = {2021},

date = {2021-01-01},

booktitle = {2021 44TH INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS AND SIGNAL PROCESSING (TSP)},

pages = {381--385},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

abstract = {Space Wire (SpW) technology is a data-handling spacecraft network for 

 that connects on-board sub-systems. The European Space Agency (ESA) is 

 encouraging research in the area of wireless intra-spacecraft 

 communications in order to develop a solution complementary to the wired 

 infrastructure. The HiSAT project aims to provide a high-throughput 

 end-to-end intra-spacecraft wireless solution. This paper presents a 

 TCP/IP-to-SpW converter employing a ZCU102 development board on which 

 the Lightweight IP networking stack and SpW IP core were integrated. The 

 validation of the proposed solution consists in investigating the SpW 

 data link initialization, data integrity and data rate of the 

 implemented design.},

note = {44th International Conference on Telecommunications and Signal Processing (TSP), ELECTR NETWORK, JUL 26-28, 2021},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Codau2021,

title = {Design and Validation of a Wireless Bridge for Intra-Spacecraft Communications},

author = {Cristian Codau and Rares-Calin Buta and Botond Sandor Kirei and Andra Pastrav and Raluca Simedroni and Paul Dolea and Tudor Palade and Horia Hedesiu and Emanuel Puschita},

editor = {Norbert Herencsar},

doi = {10.1109/TSP52935.2021.9522609},

isbn = {978-1-6654-2933-7},

year  = {2021},

date = {2021-01-01},

booktitle = {2021 44TH INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS AND SIGNAL PROCESSING (TSP)},

pages = {386--389},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

abstract = {SpaceWire (SpW) is a reliable standard for wired intra-satellite 

 communications offering data rates up to 200Mbps. However, the wiring 

 mass of a satellite greatly increases the launching costs and, as such, 

 efforts are being made to replace the wired communications with wireless 

 links Ultrawideband (UWB) communications proved to be a robust solution 

 but the data rate is low. To provide throughputs similar to SpW, the 

 HiSAT project considers using the IEEE802.11ac standard for the wireless 

 links. In the framework of the HiSAT project, this paper presents the 

 design and validation of a wireless bridge for intra-spacecraft 

 communications. The proposed wireless bridge architecture is based on 

 National Instruments (NI) USRP 2954R Software Defined Radios (SDRs) 

 controlled by the NI PXIe-8800 host computer. The wireless bridge 

 performance is evaluated for 1x2, 1x4, 2x1, 4x1 antenna configurations. 

 Finally, the wireless bridge design is validated for real-time video 

 transmissions.},

note = {44th International Conference on Telecommunications and Signal Processing (TSP), ELECTR NETWORK, JUL 26-28, 2021},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2019,

title = {Power and Area Estimation of Discrete Filters in CMOS Integrated Circuits},

author = {Botond Sandor Kirei and Calin Farcas and Marina Dana Topa},

issn = {2326-0262},

year  = {2019},

date = {2019-01-01},

booktitle = {2019 SIGNAL PROCESSING ALGORITHMS, ARCHITECTURES, ARRANGEMENTS, AND APPLICATIONS (SPA 2019)},

pages = {67-70},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {Inst Elect & Elect Engineers Inc; Inst Elect & Elect Engineers Inc, Reg 8 Europe, Middle E and Africa, Poland Sect; Inst Elect & Elect Engineers Inc, Circuits & Syst Chapter; Poznan Univ Technol, Fac Comp, Inst Automat & Robot, Div Signal Proc & Elect Syst},

series = {Signal Processing Algorithms Architectures Arrangements and Applications},

abstract = {The paper proposes a power/area estimation methodology of discrete time 

 filters in CMOS integrated circuits. The difficulty of obtaining an 

 early (at register transfer level design phase) power/area estimate of a 

 filter is many-fold, as estimates depend on (i) target technology, (ii) 

 clocking frequency and (iii) filter complexity (filter topology, length 

 of filter and selected numerical representation of the filter). The 

 estimation methodology consists of (i) VHDL description of the desired 

 discrete time filter using components from PAELib - a previously 

 developed VHDL library suitable for power and area estimation of CMOS 

 digital circuits -, (ii) generation of random data samples and clock 

 signal and (iii) logic simulation. The estimation methodology is 

 demonstrated on three IIR topologies: direct form I/II and lattice. 

 Power and area estimates are obtained for various filter complexities (5 

 different filter orders and 8 different resolutions) for each topology. 

 From the resulting data, two empirical formula are devised for area and 

 power estimates, in which both are proportional to filter order and 

 resolution and a technology dependent constant. Thus, the power and area 

 estimation - with respect to filter complexity - is reduced to computing 

 a technology dependent constant.},

note = {23rd IEEE Conference on Signal Processing Algorithms, Architectures, Arrangements, and Applications (SPA), Poznan Univ Technol, Piotrowo Campus, Ctr Mechatron, Biomechan, & Nanoengi, Poznan, POLAND, SEP 18-20, 2019},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Chereja2018,

title = {Power Dissipation Estimation of CMOS Digital Circuits at the Gate Level in VHDL},

author = {Verginia-Iulia-Maria Chereja and Adriana-Ioana Potarniche and Sergiu-Alex Ranga and Botond Sandor Kirei and Marina Dana Topa},

issn = {2475-787X},

year  = {2018},

date = {2018-01-01},

booktitle = {2018 13TH INTERNATIONAL SYMPOSIUM ON ELECTRONICS AND TELECOMMUNICATIONS (ISETC)},

pages = {63-66},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {Politehnica Univ Timisoara; IEEE; Assoc Elect Engineers Timisoara; Fac Elect Telecommunicat & Informat Technologies; IEEE Romanian Sect; Romanian Acad Tech Sci; AlfaTest; Continental; Honeywell; Nokia},

series = {International Symposium on Electronics and Telecommunications},

abstract = {This paper proposes a static and dynamic power dissipation estimation 

 method of CMOS digital circuits at the gate level. While static power 

 dissipation can be easily estimated by the product of subthreshold 

 leakage current and supply voltage, the dynamic power estimate is 

 obtained by monitoring the switching activity in the circuit and a 

 careful accounting of the parasitic capacitances charge/discharge. A 

 VHDL library was developed to implement the monitoring of leakage 

 currents and switching activity of several circuits (logic gates, 

 encoders, multiplexers, counters) and to estimate their power 

 dissipation. The advantage of using the library is that in early design 

 stages assumptions can be made about the power dissipation of the 

 designed circuit in a target technology. The downside is that the power 

 estimation accuracy depends on the granularity of the structural 

 description that is carried out in VHDL. To verify the estimated power, 

 a finite state machine was implemented with standard logic gates from 

 the 74HC series and its power dissipation was measured. The error 

 between the measured and estimated power is approximately 20%.},

note = {13th International Symposium on Electronics and Telecommunications (ISETC), Timisoara, ROMANIA, NOV 08-09, 2018},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2017,

title = {An All-Digital Frequency Locked Loop and its Linearized s-domain Model},

author = {Botond Sandor Kirei and Calin Farcas and Robert Groza and Marina Dana Topa},

editor = {M Mustra and D Vitas and B ZovkoCihlar},

issn = {1334-2630},

year  = {2017},

date = {2017-01-01},

booktitle = {PROCEEDINGS OF 2017 INTERNATIONAL SYMPOSIUM ELMAR},

pages = {91-94},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {IEEE Reg 8; IEEE Croatia Sect; FER},

series = {ELMAR Proceedings},

abstract = {The proposed all-digital frequency locked loop features a digitally 

 controlled oscillator, a counter & latch as a frequency sensor and an 

 accumulator in the control loop. The number of oscillation cycles are 

 counted during a logic high of the reference signal and it is subtracted 

 from a desired value set by the user, thus an error signal is obtained. 

 The error is accumulated, and a digital control word is formed for the 

 digitally controlled oscillator. Discrete time domain equations are 

 devised for the proposed ADFLL, and the convergence to the desired 

 frequency is proven. Moreover, the analysis is completed with the 

 s-domain linearized model of the system. Numerical results comprise 

 simulations carried out in (i) a logic simulator for the Verilog 

 behavioral description of the ADFLL and (ii) a PSPICE simulation for the 

 s-domain model.},

note = {59th ELMAR International Symposium (ELMAR), Zadar, CROATIA, SEP 18-20, 2017},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Groza2017,

title = {Digitally controlled current-mode quadrature oscillator},

author = {Robert Groza and Gabor Csipkes and Botond Sandor Kirei and Marina Dana Topa},

issn = {1545-827X},

year  = {2017},

date = {2017-01-01},

booktitle = {2017 INTERNATIONAL SEMICONDUCTOR CONFERENCE (CAS), 40TH EDITION},

pages = {261-264},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {IEEE; IEEE Electron Devices Soc; Minist Res Innovat; IEEE Romania Sect, Electron Devices Chapter; IMT Bucharest, Natl Inst Res & Dev Microtechnologiers; S C SITEX 45 SRL; S C New Style Trans Prest S R L; S C Marido Cafe Club S R L; CARL ZEISS Instruments S R L},

series = {International Semiconductor Conference},

abstract = {A digitally controlled current-mode quadrature oscillator (DCC-MQO) is 

 proposed. The circuit consist of four cascaded log-domain first order 

 low-pass filter and a digitally programmable current division network. 

 The lossy log-domain integrator gain and time constant can be adjusted 

 using the bias currents of the logarithmic and exponential building 

 blocks. The programmable current division network provides the bias 

 currents for the log-domain cells which can be adjusted using a digital 

 control word. The building blocks were implemented in a generic 180nm 

 BiCMOS process and Spice simulation were performed to demonstrate de 

 viability of the design.},

note = {40th International Semiconductor Conference (CAS), Sinaia, ROMANIA, OCT 11-14, 2017},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Szopos2017,

title = {Discrete Domain Modeling of an All-Digital Frequency Locked Loop},

author = {Erwin Szopos and Ioana Saracut and Botond Sandor Kirei and Marina Dana Topa},

issn = {1545-827X},

year  = {2017},

date = {2017-01-01},

booktitle = {2017 INTERNATIONAL SEMICONDUCTOR CONFERENCE (CAS), 40TH EDITION},

pages = {247-250},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {IEEE; IEEE Electron Devices Soc; Minist Res Innovat; IEEE Romania Sect, Electron Devices Chapter; IMT Bucharest, Natl Inst Res & Dev Microtechnologiers; S C SITEX 45 SRL; S C New Style Trans Prest S R L; S C Marido Cafe Club S R L; CARL ZEISS Instruments S R L},

series = {International Semiconductor Conference},

abstract = {In this paper an all-digital frequency locked loop - which is composed 

 of a digitally controlled oscillator, a counter and a latch (with the 

 scope of frequency detection) and an accumulator in the control loop - 

 is modeled in the z-domain considering two significant error sources 

 that occur in its structure: the finite resolution of the digital 

 signals and the inaccuracy of the frequency detection. The developed 

 discrete time model was implemented in LabVIEW and it was compared 

 against a structural description of the frequency locked loop achieved 

 in Verilog. Simulation results for digitally controlled oscillator with 

 8, 10 and 12 bits resolution were obtained for both models. Employing a 

 low resolution digitally controlled oscillator the loop can achieve 

 frequency lock in less time, but its jitter performance is worst. The 

 jitter can be improved if higher resolution is used, at the cost of a 

 higher frequency lock time. The peak-to-peak jitter performance was 

 plotted against the resolution of the digitally controlled oscillator 

 that is helpful to determine the minimum for a desired jitter.},

note = {40th International Semiconductor Conference (CAS), Sinaia, ROMANIA, OCT 11-14, 2017},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Grajdeanu2016,

title = {Comparison of Four Design Environments Employed to Analyze a Switched-Capacitor DC-DC Converter},

author = {Alina-Teodora Grajdeanu and Cristian Raducan and Cosmin-Sorin Plesa and Botond Sandor Kirei and Marius Neag},

isbn = {978-1-5090-3748-3},

year  = {2016},

date = {2016-01-01},

booktitle = {2016 12TH IEEE INTERNATIONAL SYMPOSIUM ON ELECTRONICS AND TELECOMMUNICATIONS (ISETC'16)},

pages = {190-193},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {IEEE; Politechnica Univ Timisoara; Fac Elect & Telecomunicat; Assoc Elect Engineers Timisoara; Acad Stiinte Tehnice; Nokia; Continental; Commun Test Syst},

abstract = {This paper compares the performance of four popular design environments 

 for analog and mixed-signal applications - Virtuoso from Cadence Inc., 

 SIMetrix/SIMPLIS, Simulink and CppSim - when used for system level 

 analysis of a standard switched capacitor DC-DC converter. Virtuoso is 

 the most expensive of the four but it has the best user interface and 

 its Spice-level circuit simulators provide very good accuracy. Also, it 

 allows complete top-down design, from system- to circuit-level within 

 the same environment. However, it may not be best suited for first-pass 

 system-level analysis of switching circuits such as DC-DC converters due 

 to its long simulation time and convergence issues. Numerical solvers 

 such as MATLAB Simulink and CppSim represent functional blocks by 

 input-state-output relationships, thus avoiding the solving of large 

 sets of simultaneous equations. This reduces dramatically the simulation 

 time at the expense of poorer accuracy. SIMetrix/SIMPLIS converts 

 non-linear models to a piecewise linear straight-line model achieving a 

 fast simulation time for switching circuits. For a fair comparison, the 

 same circuit was analyzed under the same conditions by using the four 

 design environments; the trade-offs between cost, accuracy and 

 simulation time are highlighted.},

note = {12th IEEE International Symposium on Electronics and Telecommunications (ISETC), Timisoara, ROMANIA, OCT 27-28, 2016},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2016,

title = {A General Procedure for Datapath and Control Design and Its Description in SystemVerilog},

author = {Botond Sandor Kirei and Marina Topa and Sorin Hintea},

isbn = {978-1-5090-3748-3},

year  = {2016},

date = {2016-01-01},

booktitle = {2016 12TH IEEE INTERNATIONAL SYMPOSIUM ON ELECTRONICS AND TELECOMMUNICATIONS (ISETC'16)},

pages = {129-132},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {IEEE; Politechnica Univ Timisoara; Fac Elect & Telecomunicat; Assoc Elect Engineers Timisoara; Acad Stiinte Technice; Nokia; Continental; Commun Test Syst},

abstract = {This paper presents a general procedure for datapath and control design, 

 an example and a proposed laboratory work. The objective of the 

 procedure is to transform a pseudo code (or a code written in a 

 functional programming language) of an algorithm into a synthesizable 

 HDL description. The procedure is general enough to be applied on simple 

 algorithms (a few variables, value assignments and repetitive cycles). 

 As an example, a simple C function is transposed to a SystemVerilog 

 synthesizable code based on the proposed procedure. The laboratory work 

 for student classes aims to exemplify HDL concepts, such as 

 structural/behavioral, synthesizable/nonsynthesizable HDL description 

 and datapath/control design.},

note = {12th IEEE International Symposium on Electronics and Telecommunications (ISETC), Timisoara, ROMANIA, OCT 27-28, 2016},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2015,

title = {Testbench for Evaluations of Maximum Power Point Tracking Algorithms for Solar Energy Harvesting},

author = {Botond Sandor Kirei and Gabriel Oltean and Marina Dana Topa},

isbn = {978-1-4673-7488-0},

year  = {2016},

date = {2016-01-01},

booktitle = {2015 INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS (ISSCS)},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {Gheorghe Asachi Tech Univ Iasi, Fac Elect Telecommun & Informat Technol; IEEE Romania Sect CAS Chapter; IEEE CAS Soc; IEEE; CAS},

abstract = {In this paper, a simple testbench is presented for quick evaluation and 

 comparison of maximum power point tracking (MPPT) algorithms. As a large 

 variety of MPPT algorithms appeared and spread in the last two decades, 

 it is necessary to provide quick and relevant means of fair comparison. 

 Thus a testbench and its MATLAB/Simulink implementation are proposed and 

 described. In this testbench two MPPT algorithms are compared: the 

 widespread Perturb and Observe and one based on fuzzy logic. The 

 testbench evaluates their convergence rate, tracking capability and 

 steady state error.},

note = {2015 International Symposium on Signals, Circuits and Systems (ISSCS), Iasi, ROMANIA, JUL 09-10, 2015},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Oltean2015,

title = {Signal approximation using GA guided wavelet decomposition},

author = {Gabriel Oltean and Laura-Nicoleta Ivanciu and Botond Kirei},

isbn = {978-1-4673-7488-0},

year  = {2015},

date = {2015-01-01},

booktitle = {2015 INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS (ISSCS)},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {Gheorghe Asachi Tech Univ Iasi, Fac Elect Telecommun & Informat Technol; IEEE Romania Sect CAS Chapter; IEEE CAS Soc; IEEE; CAS},

abstract = {Signal approximation is a matter of great interest, as working with 

 complete time-sampled signals requires great memory and computational 

 resources. In order to diminish these requirements, signal compression 

 and signal approximation methods are widely used. The paper proposes a 

 signal approximation method, using a genetic algorithm that guides the 

 wavelet decomposition process, by providing specific information, such 

 as: the mother wavelet, the number of selected coefficients, and the 

 decomposition level. The tradeoff between the quality of the signal 

 approximation and its complexity is addressed in the objective function 

 of the genetic algorithm. The method is validated using three test 

 signals, specific to analog circuits. Simulation results prove that the 

 method provides substantial dimensionality reduction, with increased 

 accuracy, which makes it a viable candidate for applications that employ 

 signal storage, transmission, and processing.},

note = {2015 International Symposium on Signals, Circuits and Systems (ISSCS), Iasi, ROMANIA, JUL 09-10, 2015},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2013,

title = {Matlab Toolbox for RF Receiver Modeling},

author = {Botond Sandor Kirei and Marius Gheorghe Neag and Marina Dana Topa},

editor = {A Vlaicu and S Brad},

doi = {10.4028/www.scientific.net/AEF.8-9.500},

issn = {2234-9898},

year  = {2013},

date = {2013-01-01},

booktitle = {INTERDISCIPLINARY RESEARCH IN ENGINEERING: STEPS TOWARDS BREAKTHROUGH INNOVATION FOR SUSTAINABLE DEVELOPMENT},

volume = {8-9},

pages = {500+},

publisher = {TRANS TECH PUBLICATIONS LTD},

address = {KREUZSTRASSE 10, 8635 DURNTEN-ZURICH, SWITZERLAND},

organization = {Tech Univ Cluj Napoca; Politehnica Univ Timisoara; Gh Asachi Univ Iasi},

series = {Advanced Engineering Forum},

abstract = {In this paper a novel RF receiver modeling approach is presented. The 

 novelty consists in the usage of the object oriented programming instead 

 of the usual imperative programming. Classes were defined for entities 

 as signal, non-ideality and RF/analog block, in order to achieve a basic 

 RF receiver model. The main circuit non-idealities were identified, 

 non-ideality parameters and their analytical models were encapsulated 

 into classes. The effectiveness of the proposed modeling approach was 

 demonstrated by developing in MATLAB a fairly complete model of a direct 

 conversion receiver.},

note = {Conference on Interdisciplinary Research in Engineering Steps towards Breakthrough Innovation for Sustainable Development (INTERIN 2013), Cluj Napoca, ROMANIA, FEB 25-MAR 01, 2013},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2013a,

title = {Matlab Toolbox for RF Receiver Modeling},

author = {Botond Sandor Kirei and Marius Gheorghe Neag and Marina Dana Topa},

year  = {2013},

date = {2013-01-01},

booktitle = {Advanced Engineering Forum},

volume = {8},

pages = {500--507},

organization = {Trans Tech Publications Ltd},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2011,

title = {Composite RF Tuner Models and Their Object Oriented Implementation},

author = {Botond Sandor Kirei and Marius Neag and Marina Dana Topa},

isbn = {978-1-4577-1411-5},

year  = {2011},

date = {2011-01-01},

booktitle = {2011 34TH INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS AND SIGNAL PROCESSING (TSP)},

pages = {150-154},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {IEEE; KTU; ZUT; VSB; STU; UL; CTU; IEEE Czechoslovakia Sect; ProfiNET Test; T-Mobile},

abstract = {This paper presents a novel approach to RF tuner modeling, called 

 composite modeling. The RF/analog blocks are composed by analytical 

 models, obtained by selecting, configuring and merging of pre-defined 

 attributes; these attributes are closed-form analytical representations 

 of the analog signal-processing functions (gain, filtering, frequency 

 conversion, etc.) and the non-idealities considered (noise, 

 nonlinearity, carrier frequency offset, I/Q imbalance, etc.). A 

 framework for modeling RF tuners based on object oriented programming 

 was developed using this method. It enables the development of 

 well-structured yet fully scalable and reconfigurable models - thus easy 

 to maintain and refine further, by adding new features; also, the class 

 hierarchy for object oriented implementation is given. The usefulness 

 and flexibility of the proposed approach is demonstrated by an example, 

 the modeling and analysis of a DVB-H tuner for both passband and 

 equivalent baseband simulation.},

note = {34th International Conference on Telecommunications and Signal Processing (TSP), Budapest, HUNGARY, AUG 18-20, 2011},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Contan2011,

title = {Nonlinear Acoustic System Identification using a Combination of Volterra and Power Filters},

author = {Cristian Contan and Marina Topa and Botond Kirei and Ioana Homana},

doi = {10.1109/ISSCS.2011.5978752},

isbn = {978-1-4577-0201-3},

year  = {2011},

date = {2011-01-01},

booktitle = {2011 10TH INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS (ISSCS)},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {Gheorghe Asachi Tech Univ Iasi, Fac Elect, Telecommunicat & Informat Technol; IEEE Romania Sect Circuits & Syst Soc Chapter},

abstract = {The paper proposes a nonlinear system identification method that uses a 

 combination of adaptive linear, Volterra and power filters. Adaptation 

 of the kernels is made using a Normalized Least Mean Square algorithm. 

 The method is applied in echo cancellation, where several sources of 

 nonlinearities exist: the overdriven amplifier, the small loudspeaker at 

 high volume, the room with different absorbent walls. Functions with 

 nonlinear characteristics are chosen to model these distortions. The 

 evaluation is made in terms of Echo Return Loss Enhancement. Results 

 show that the overall convex combination approach performs better or at 

 least as well as the best single adaptive filter.},

note = {10th International Symposium on Signals, Circuits and Systems (ISSCS), Iasi, ROMANIA, JUN 30-JUL 01, 2011},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Homana2010,

title = {Adaptive Algorithms for Double-Talk Echo Cancelling},

author = {Ioana Homana and Marina Topa and Botond Sandor Kirei and Cristian Contan},

doi = {10.1109/ISETC.2010.5679359},

isbn = {978-1-4244-8458-4},

year  = {2010},

date = {2010-01-01},

booktitle = {2010 9TH INTERNATIONAL SYMPOSIUM ON ELECTRONICS AND TELECOMMUNICATIONS (ISETC)},

pages = {349-352},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {IEEE; Univ Timisoara; Fac Elect & Telecommunicat; Assoc Elect Engineers Timisoara; IEEE Romanian Sect; IEEE ComSoc Germany Chapter; Romanian Acad Tech Sci; Continental; Alcatel Lucent},

abstract = {In the paper, an echo canceller based on a system identification scheme 

 with adaptive algorithms is presented. The algorithms consider FIR 

 filters with the taps chosen to minimize an error signal derived from 

 the system according to a stochastic gradient-based method. The 

 following adaptive filters are discussed and simulated in Matlab: 

 classical LMS and its variants: NLMS, VSLMS, VSNLMS and RLS. The echo 

 was simulated by adding several delayed and attenuated replica to a 

 vocal input. The comparison between the algorithms was made taking into 

 account the mean-square error (MSE) and average attenuation (AV), as 

 well as the required number of multiplications.},

note = {9th International Symposium on Electronics and Telecommunications (ISETC), Timisoara, ROMANIA, NOV 11-12, 2010},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2010a,

title = {Symmetric Adaptive Decorrelation for I/Q Imbalance Compensation in Narrowband Receivers},

author = {Botond Sandor Kirei and Marius Neag and Marina Dana Topa},

doi = {10.1109/ISETC.2010.5679360},

isbn = {978-1-4244-8458-4},

year  = {2010},

date = {2010-01-01},

booktitle = {2010 9TH INTERNATIONAL SYMPOSIUM ON ELECTRONICS AND TELECOMMUNICATIONS (ISETC)},

pages = {353-356},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {IEEE; Univ Timisoara; Fac Elect & Telecommunicat; Assoc Elect Engineers Timisoara; IEEE Romanian Sect; IEEE ComSoc Germany Chapter; Romanian Acad Tech Sci; Continental; Alcatel Lucent},

abstract = {Symmetric Adaptive Decorrelation (SAD) for I/Q imbalance compensation is 

 addressed in this work. First, a simple I/Q imbalance signal model that 

 can be used in both Low-IF and Zero-IF architectures is presented. Next, 

 prior art of the complex valued LMS filtering for I/Q imbalance 

 compensation, which is very similar to the SAD, is briefly analysed. It 

 is shown that the complex valued LMS filtering can de-correlate the 

 imbalanced I/Q signal, but a distortion factor still remains in the 

 recovered signal. Then, a simple method for eliminating this distortion 

 is presented.},

note = {9th International Symposium on Electronics and Telecommunications (ISETC), Timisoara, ROMANIA, NOV 11-12, 2010},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Topa2010b,

title = {Evaluation of acoustic parameters in a room},

author = {Marina Ţopa and Norbert Toma and Botond Kirei and Ioana Crişan},

year  = {2010},

date = {2010-01-01},

booktitle = {Proceedings of the 9th WSEAS international conference on Signal processing},

pages = {41--44},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Homana2010a,

title = {Semi-Blind Equalization Using the Constant Modulus Algorithm},

author = {Ioana Homana and Marina Dana Topa and Botond Sandor Kirei},

editor = {L Miclea and I Stoian},

issn = {1844-7872},

year  = {2010},

date = {2010-01-01},

booktitle = {PROCEEDINGS OF 2010 IEEE INTERNATIONAL CONFERENCE ON AUTOMATION, QUALITY AND TESTING, ROBOTICS (AQTR 2010), VOLS. 1-3},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {IEEE},

series = {IEEE International Conference on Automation Quality and Testing Robotics},

abstract = {The equalization of digital communication channels consists in the 

 recovery of the data symbols transmitted through a distorting medium. In 

 this paper we estimate an input signal given the output and the channel, 

 specifically we simulate a semi-blind equalization schemes, based on the 

 Constant Modulus Algorithm (CMA)usingtwo adaptive filtering algorithms: 

 the Least Mean Square and the Recursive Least Square Algorithms. The 

 Mean Square Error (MSE) and the Symbol Error Rate (SER) measure the 

 performance. The simulations show that the Recursive Least Square 

 Algorithm based on the Constant Modulus algorithm (RLS-CMA) is better 

 than the other method.},

note = {IEEE International Conference on Automation, Quality and Testing, Robotics (AQTR), Cluj Napoca, ROMANIA, MAY 28-30, 2010},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2010,

title = {On I/Q Imbalance Compensation Based on Adaptive Filtering in Low-IF and Zero-IF Radio},

author = {B. S. Kirei and M. Neag and M. D. Topa},

editor = {L Miclea and I Stoian},

issn = {1844-7872},

year  = {2010},

date = {2010-01-01},

booktitle = {PROCEEDINGS OF 2010 IEEE INTERNATIONAL CONFERENCE ON AUTOMATION, QUALITY AND TESTING, ROBOTICS (AQTR 2010), VOLS. 1-3},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {IEEE},

series = {IEEE International Conference on Automation Quality and Testing Robotics},

abstract = {This paper deals with adaptive filters, based on symmetric adaptive 

 decorrelation, used for I/Q imbalance compensation in wireless 

 receivers. Analytical analysis of two such filters reported in the 

 literature shows that the output signal suffers a distortion due to the 

 adaptive process. A formula for the distortion factor is deduced, which 

 is then validated experimentally: a filter was implemented on a FPGA 

 platform and tests have been carried out for imbalanced QAM-16 input 

 signals. Moreover, this work shows that the effects of I/Q imbalance can 

 be described analytically in a similar manner for both Low- and Zero-IF.},

note = {IEEE International Conference on Automation, Quality and Testing, Robotics (AQTR), Cluj Napoca, ROMANIA, MAY 28-30, 2010},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Dornean2009,

title = {Sub-Band Adaptive Filtering for Acoustic Echo Cancellation},

author = {Irina Dornean and Marina Topa and Botond Sandor Kirei and Marius Neag},

doi = {10.1109/ECCTD.2009.5275107},

isbn = {978-1-4244-3895-2},

year  = {2009},

date = {2009-01-01},

booktitle = {2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2},

pages = {810-813},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

abstract = {Sub-band filtering is employed in various system identification 

 applications. It reduces the computational complexity and adaptation 

 time. The paper focuses on sub-band filtering for acoustic echo 

 cancellation. A Simulink model for 2, 4, 8 sub-bands was created and 

 simulated. The echo is created by applying a vocal test to a first 

 Schroeder reverberator. The performance of the full- and sub-band echo 

 canceller is measured in terms of error signal and echo-return loss 

 enhancement.},

note = {European Conference on Circuit Theory Design, Antalya, TURKEY, AUG 23-27, 2009},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2009,

title = {Reconfigurable Zero/Low-IF Receiver},

author = {Botond Sandor Kirei and Marina Dana Topa and Marius Neag},

isbn = {978-1-4244-3784-9},

year  = {2009},

date = {2009-01-01},

booktitle = {ISSCS 2009: INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2, PROCEEDINGS,},

pages = {417-420},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {Gheorghe Asachi Tech Univ Lasi, Fac Elect & Telecommun & Informat Technol; IEEE Romania Sect CAS Chapter},

abstract = {This paper proposes an architecture for reconfigurable receivers that 

 can operate in both Low- and Zero-IF modes. The hardware reuse is 

 maximized by a newly proposed reconfigurable Delta /Sigma-Delta 

 modulator for data conversion. A new approach to the design of second 

 order approximation for derivate computation in A converter is also 

 introduced. Simulation results shows the possibility to achieve data 

 conversion at -70dB SQNR in Sigma-Delta mode and -55dB in Delta mode.},

note = {International Symposium on Signals, Circuits and Systems, Iasi, ROMANIA, JUL 09-10, 2009},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Homana2009,

title = {Echo cancelling using adaptive algorithms},

author = {Ioana Homănă and Marina Dana Ţopa and Botond Sandor Kirei},

year  = {2009},

date = {2009-01-01},

booktitle = {2009 15th International Symposium for Design and Technology of Electronics Packages (SIITME)},

pages = {317--321},

organization = {IEEE},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2009a,

title = {Novel FIR implementation for acoustic signal processing},

author = {Botond Sandor Kirei and Marina Dana Topa and Albert Csaba Fazakas and Norbert Toma},

year  = {2009},

date = {2009-01-01},

booktitle = {2009 15th International Symposium for Design and Technology of Electronics Packages (SIITME)},

pages = {351--354},

organization = {IEEE},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Dornean2008,

title = {HDL implementation of the variable step size N-LMS adaptive algorithm},

author = {I. Dornean and M. Topa and B. S. Kirei and G. Oltean},

editor = {L Miclea and I Stoian},

doi = {10.1109/AQTR.2008.4588920},

isbn = {978-1-4244-2576-1},

year  = {2008},

date = {2008-01-01},

booktitle = {2008 IEEE INTERNATIONAL CONFERENCE ON AUTOMATION, QUALITY AND TESTING, ROBOTICS (AQTR 2008), THETA 16TH EDITION, VOL III, PROCEEDINGS},

pages = {243-246},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {IEEE Comp Soc, TTTC},

abstract = {This paper proposes a Verilog implementation of the Normalized Least 

 Mean Square (NLMS) adaptive algorithm, having a variable step size. The 

 envisaged application is the identification of an unknown system. First 

 the convergence of derived LMS algorithms was analyzed in a Simulink 

 application. The NLMS was chosen for its good convergence and stability. 

 Next a HDL implementation was developed for a 0 order NLMS adaptive 

 filter. ModelSim simulations results altogether with plots obtained in 

 Matlab prove the good behavior of the NLMS algorithm, making it an 

 important competitor for the conventional LMS.},

note = {IEEE International Conference on Automation, Quality and Testing, Robotics (AQTR 2008), Cluj Napoca, ROMANIA, MAY 22-25, 2008},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2008,

title = {Image rejection filter based on blind source separation for low-IF receivers},

author = {B. S. Kirei and M. Topa and V. Popescu and I. Dornean},

editor = {L Miclea and I Stoian},

doi = {10.1109/AQTR.2008.4588922},

isbn = {978-1-4244-2576-1},

year  = {2008},

date = {2008-01-01},

booktitle = {2008 IEEE INTERNATIONAL CONFERENCE ON AUTOMATION, QUALITY AND TESTING, ROBOTICS (AQTR 2008), THETA 16TH EDITION, VOL III, PROCEEDINGS},

pages = {253-256},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {IEEE Comp Soc, TTTC},

abstract = {In this paper the low-IF receiver architecture, the image interference 

 due to the IF domain, phenomena also referred as I/Q imbalance and a 

 modification for a blind source separation algorithm for image rejection 

 are presented. The modified algorithm considers all the received samples 

 of IF signal for the estimation of the I/Q imbalance parameters. The 

 resulting image rejection filter's major advantage is the single clock 

 domain implementation at the cost of power consumption increase. A 

 Simulink model was created to check the availability of the enhanced 

 algorithm, its performance measured and compared to the existing 

 implementation. Simulations show that the proposed filter achieves the 

 same performance in terms of IRR as the reported method.},

note = {IEEE International Conference on Automation, Quality and Testing, Robotics (AQTR 2008), Cluj Napoca, ROMANIA, MAY 22-25, 2008},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2008a,

title = {A Propagation Model for Coupled Lines},

author = {Botond Sandor Kirei and Victor Popescu and Marina Dana Topa and Ioana Popescu},

editor = {Z IllyefalviVitez},

doi = {10.1109/ISSE.2008.5276601},

issn = {2161-2536},

year  = {2008},

date = {2008-01-01},

booktitle = {2008 31ST INTERNATIONAL SPRING SEMINAR ON ELECTRONICS TECHNOLOGY: RELIABILITY AND LIFE-TIME PREDICTION},

pages = {610-615},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

organization = {Budapest Univ Technol & Econ, Dept Elect Technol},

series = {International Spring Seminar on Electronics Technology ISSE},

abstract = {This paper develops the propagation model for cross-coupled transmission 

 lines in the quasi transversal electromagnetic assumption starting from 

 the first order form of wave equations. The most difficult problem is to 

 apply the boundary conditions. To prove the correctness of the 

 propagation model both MATLAB and PSCPICE simulations were carried out.},

note = {31st International Spring Seminar on Electronics Technology, Budapest, HUNGARY, MAY 07-11, 2008},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2008b,

title = {Novel image rejection filter based on neural networks},

author = {Botond Sandor Kirei and Marina Topa and Irina Dornean and Albert Fazakas},

editor = {I Lovrek and RJ Howlett and LC Jain},

issn = {0302-9743},

year  = {2008},

date = {2008-01-01},

booktitle = {KNOWLEDGE-BASED INTELLIGENT INFORMATION AND ENGINEERING SYSTEMS, PT 3, PROCEEDINGS},

volume = {5179},

pages = {343-350},

publisher = {SPRINGER-VERLAG BERLIN},

address = {HEIDELBERGER PLATZ 3, D-14197 BERLIN, GERMANY},

organization = {KES Int, Innovat Knowledge Based & Intelligent Engn Syst; Univ Zagreb, Fac Elect Engn & Comp; Republic Croatia, Minist Sci, Educ & Sports; Ericsson Nikola Tesla; Croatian Natl Tourist Board; Zagreb Tourist Board},

series = {Lecture Notes in Artificial Intelligence},

abstract = {In this paper a novel image rejection algorithm based on neural networks 

 is proposed. The low-IF receiver architecture and the phenomena of I/Q 

 imbalance (also referred as image interference) are described. The 

 proposed filter is an enhancement of a complex LMS adaptive filter, 

 which separates the desired and image signals, but the recovered signal 

 still suffers from the effects of imbalance parameters. This is 

 corrected by the proposed filter. Simulink simulations were performed in 

 order to prove the functionality of the novel filter. The simulations 

 prove the convergence and stability of the filter. The necessary sample 

 number is given to achieve -60 dB image rejection.},

note = {12th International Conference on Knowledge-Based Intelligent Information and Engineering Systems, Zagreb, CROATIA, SEP 03-05, 2008},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Kirei2008c,

title = {Image Rejection Filter Based on Complex LMS Filter for Low-IF Receivers},

author = {Botond Sandor Kirei and Irina Dornean and Marina Topa},

editor = {M Grgic and S Grgic},

isbn = {978-953-7044-06-0},

year  = {2008},

date = {2008-01-01},

booktitle = {PROCEEDINGS ELMAR-2008, VOLS 1 AND 2},

pages = {203-206},

publisher = {CROATIAN SOCIETY ELECTRONICS MARINE},

address = {ELMAR, ZADAR, CROATIA},

organization = {Croatian Soc Elect Marine; Univ Zagreb, Dept Wireless Commun, Fac Elect Engn & Comp; Tankerska Plovidba; OiV, Transmitters & Commun; HRT, Croatian Radio & Televis; HEP; IEEE Reg 8; IEEE Croatia Sect; European Assoc Signal, Speech & Image Proc; Croatian Acad Engn; Republic Croatia, Minist Sea, Transport & Infrastruct; Univ Zagreb, Fac Elect Engn & Comp; Univ Zadar},

series = {MONOGRAPH OF THE COTSEN INSTITUTE OF ARCHAELOGY, UCLA},

abstract = {In this paper the low-IF receiver architecture, the image interference 

 due to the IF domain, phenomena also referred as I/Q imbalance and a 

 complex LMS filter for image rejection are presented A Simulink model 

 was created to check the availability of the LMS filter, its performance 

 measured and compared to the existing implementation. Simulation shows 

 that the image rejection ratio is limited at 32dB by the LMS filter's 

 learning rate.},

note = {50th International Symposium ELMAR, Zadar, CROATIA, SEP 10-12, 2008},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Popescu2007,

title = {Analysis of lossless differential microstrip line},

author = {V. Popescu and B. S. Kirei and M. Topa and C. Munteanu},

doi = {10.1109/ISSE.2007.4432917},

issn = {2161-2536},

year  = {2007},

date = {2007-01-01},

booktitle = {2007 30TH INTERNATIONAL SPRING SEMINAR ON ELECTRONICS TECHNOLOGY},

pages = {551+},

publisher = {IEEE},

address = {345 E 47TH ST, NEW YORK, NY 10017 USA},

series = {International Spring Seminar on Electronics Technology ISSE},

abstract = {In this paper several aspects regarding the analysis of lossless 

 differential microstrip lines are presented. Starting from the physical 

 structure of a coupled microstrip transmission line, the per-unit-length 

 parameters were computed Then a PSPICE model for a three-conductor 

 transmission line was developed and tested in time and frequency domain. 

 For the exact analysis a system of partial differential equations was 

 set up and a general solution was given.},

note = {30th International Spring Seminar on Electronics Technology, Cluj Napoca, ROMANIA, MAY 09-13, 2007},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{Dornean2007,

title = {System identification with least mean square adaptive algorithm},

author = {Irina Dornean and Marina Topa and Botond Sandor Kirei and Erwin Szopos},

year  = {2007},

date = {2007-01-01},

booktitle = {Proceeding of Interdisciplinary in Engineering Scientific International Conference, TG. Mures--Romania (November 2007) IV},

volume = {1},

abstract = {System identification is one of the most interesting applications for adaptive filters, especially for the Least Mean Square algorithm, due to its robustness and calculus simplicity. Based on the error signal, the filter’s coefficients are updated and corrected, in order to adapt, so the output signal has the same values as the reference signal. The application enables remarkable developments and research, creating an opportunity for automation and prediction.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}