Finite state machines. Moore and Mealy FSMs. RTL modeling. Description in VHDL and Verilog.
Control/ data path circuits. AXI-Stream interface. VHDL description
Microarchitectures/Microcontrollers/Microprocessors. von-Neumann and Hardward architecture. The RISC microcontroller (von-Neumann type). Description in Verilog. Programming the microcontroller by machine code
The MIPS microcontroller (Hardward type). VHDL description. Microcontroller programming through C compilers. CISC Architecture. VLIW architecture.
Architecture of FPGAs. Systems on chip. Programmable system and programmable logic. AXI interfaces. Transaction level modeling.
Elements of structured programming in VHDL. OSSVM. Testbench architecture. Driver. Consumer. Checkboard. Random verification. Functional coverage.
Elements of Object-oriented programming. Elements of SystemVerilog syntax. Unified Verification Methodology. The architecture of the verification module.
Constraint Random Verification. Formal verification
Assertion based verification. Property description languages . Sequences, properties, coverage.
Elements of Physical Design I. Minimization of logic functions. CMOS Libraries. Technological mapping.
Elements of Physical Design II. Forests. Frequency synthesizers. Power circuits.
Elements of Physical Design III. Placement. Routing.
Project meetings/laboratory work
Specifications. Reference overview.
Preparation for control/data path design
Directed verification testbench
SystemVerilog verification methodology testbench
Synthesis.
Placement. Final routing.
Documentation. Project presentation.
References
Botond Sandor Kirei, Proiectarea sistemelor digitale cu instrumente HDL, Casa Cartii de Stiinta, 2016
M. D. Ciletti, „Advanced Digital Design with the Verilog HDL”, Ediția doua, Editura Prantice Hall, Upper Saddle River, New Jersey, 2011.
N. H. E. Weste, D. M. Harris, CMOS VLSI Design – A Circuits and Systems Perspective, Ediția patra, Editura Pearson Education, 2011
S. Kilts, „Advanced FPGA Design: Architecture, Implementation, and Optimization”, Editura Wiley-IEEE Press, 2007
C.H. Roth, L. K. John, „Digital System Design Using VHDL”, Ediția doua, Editura Thomson Learning, Toronto, Canada, 2008.
M. Zwolinski, „Digital System Design with SystemVerilog”, Ediția Pearson Education, Crawfordsville, Indiana, 2009.
I. Bucur, „Proiectare si Testare Logica”, Editura Cartea Universitara, Bucuresti, 2006
S. Golson, „State Machine Design Techniques for Verilog and VHDL”, Synopsys Journal of High-Level Design, pp. 1-2, 1994
S. Nicola, „Circuite Integrate Numerice. Aplicații în mecatronică”, Ediția Universitaria, 2005
M. E. Ilaș, C. Ilaș, „Proiectarea Circuitelor Integrate Digitale Folosind Limbajul Verilog”, Ed. MatrixRom, 2011.
Z. F. Baruch, „Structure of Computer Systems”, Editura U. T. PRES, Cluj-Napoca, 2002
Z. F. Baruch, „Structura sistemelor de calcul”, Editura Albastră, Cluj-Napoca, 2005
S. Hintea, „Tehnici de Proiectare cu Arii Logice”, Editura U. T. Press, 2003
D. Nicula, Electronică digitală – Carte de învățătură, Ediția doua, Editura Universității Transilvania din Brașov, 2015
S. Iman, S. Joshi, „The e Hardware Verification Language”, Editura Springer, 2004
L.M. Surhone, M. T. Tennoe, S. F. Henssonow, „OpenVera”, Editura Betascript Publishing, 2011.
J. Bhasker, „A SystemC Primer, Second Edition”, Editura Star Galaxy Publishing, 2004
B. S. Kirei, I. Dornean, A. Fazakas, M. Topa, “Comparing Verilog and VHDL”, Proceedings of MicroCAD 2007, Miskolc, Hungary, pg. 35-40, 22-23 March 2007
Z. Hascsi, „Proiectarea Asistată de Calculator a Circuitelor Digitale”, Notiție de curs, http://arh.pub.ro/zolih/courses/paccd/paccd.php, 22 Aprilie 2016 (ultima vizualizare)
Janick Bergeron, Eduard Cerny, Alan Hunter, Andrew Nightingale, „Verification Methodology Manual for Systemverilog”, Springer, 2005
